Tag Archives: Battery Capacity

Challenges of Low Power Applications

Designing for ultra-low-power electronics requires a trading-off between higher performance against longer battery life. Although battery capacities have improved substantially, the fundamental challenge remains the same as that of achieving higher performance for longer periods.

Reducing the power consumption and managing battery life depends primarily on minimizing the quiescent current of a circuit. This is best explained with the help of a sensor node in the Internet-of-Things. For instance, a low-power IoT application may have a battery-powered MCU controlling the door lock via a Wi-Fi connection or Bluetooth.

As most of these types of systems spend a major part of their operating time in standby mode, the quiescent current consumption in standby or sleep mode is the limiting factor when considering battery life. Careful optimization of power-management blocks of low quiescent current can lead to extending the battery life from a low of two years to a high of five or more years.

The most important bottleneck is in achieving low no-load quiescent current for low-power systems with the duty-cycle operation, as this enables longer battery life. However, designers must tradeoff between output power range, die-package area, and transient noise performance. One must realize that reducing quiescent current by decades without sacrificing performance or area can only come about through reexamining both circuit techniques and silicon technologies.

Standby quiescent current has been a concern. Historically, most solutions limited themselves to a narrow set of low-power systems. However, there have been recent breakthroughs in a quiescent current reduction in power-management building blocks. Now, LDOs or low-dropout regulators and supervisors, power switches, and DC/DC converters are using these blocks for end equipment. These include personal wearables, automotive sensors, and industrial meter applications.

For instance, the quiescent current in 5V LDOs has approximately come down by 90% every three years over the past decade. Not only has the quiescent current reduced, but there have been circuit improvements and optimization of process technologies that have led to the reduction of die area while improving the transient-noise performance.

So, what constitutes quiescent current? Basically, this is the amount of current drawn when the circuit is in an enabled condition but not supporting an external load, and not switching. This is different from the shutdown current, which the device draws from the power supply when it is in a disabled condition.

Power regulators are mostly always-on functions, and their quiescent current contributes to the overall system quiescent current. Within the power regulator, all voltage references, error amplifiers, output voltage dividers, and protection circuits contribute to the overall operating currents.

Therefore, designers determine the quiescent current that a device draws from a battery or power source by taking into account the always-on functions and leakage sources from inductors, capacitors, and resistors.

On the other hand, switching converters are different. Most switching converters include a power-saving mode. This enables a longer period for non-switching times, resulting in a reduction of the average quiescent current. But most low-quiescent current devices have internal parasitic capacitors. These cause a longer response time as they must change to the new operating point.